`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 06/18/2024 03:44:33 PM
// Design Name: 
// Module Name: LED_Ctrl_Logic
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


// module LED_Ctrl_Logic (
//     input S_AXI_ACLK,
//     input slv_reg_wren,
//     input [2:0] axi_awaddr,
//     input [31:0] slv_reg1,
//     input S_AXI_ARESETN,
//     output reg [3:0] LED
// );
//   always @(posedge S_AXI_ACLK) begin
//     if (S_AXI_ARESETN == 1'b0) LED <= 4'b0;
//     else if (slv_reg_wren && (axi_awaddr == 3'h0)) LED <= slv_reg1[3:0];
//   end

// endmodule

// module LED_Ctrl_Logic (
//     input S_AXI_ACLK,
//     input [31:0] slv_reg1,
//     output reg [3:0] LED
// );
//   always @(posedge S_AXI_ACLK) begin
//     LED <= slv_reg1[3:0];
//   end
// endmodule

module LED_Ctrl_Logic (
    input  [31:0] slv_reg1,
    output [ 3:0] LED
);
  assign LED = slv_reg1[3:0];
endmodule
